1. Field of the Invention
The present invention relates to a circuit for setting the write current of a magnetic disk apparatus, floppy disk apparatus, or other magnetic recording apparatus.
2. Description of the Related Art
In a magnetic recording apparatus, a write current is applied to a magnetic head to generate a magnetic field and thereby write data on a magnetic recording medium.
This write current is changed depending on a main operating mode of the magnetic recording apparatus. In a write current setting circuit, connections between the internal reference power source of the IC and external resistance elements provided corresponding to the different modes are switched so as to set the current to a value suitable to the mode. This enables a write current tailored to the mode to be generated and supplied to the magnetic head.
Sometimes, further, each main mode is provided with a sub-mode for complementing the mode. In this case, external resistance elements are provided corresponding to each main mode so as to correct the write current when the sub-modes are added. For example, in the case of a write current setting circuit of a 4 MB mode floppy disk drive (hereinafter referred to as an "FDD"), there are a total of six modes: three main modes, that is, 1 MB mode, 2 MB mode, and 4 MB mode, and two sub-modes for switching the current at the inner and outer circumference sides of the disk in each main mode.
FIG. 1 is a circuit diagram of an example of the configuration of a conventional write current setting circuit of an FDD. In FIG. 1, IC represents an integrated circuit, T.sub.1 to T.sub.9 IC pins, V.sub.ref an internal reference power source, AMP.sub.1 an amplifier, SW.sub.1 to SW.sub.3 main mode switch circuits, SW.sub.C1 to SW.sub.C3 sub-mode switch circuits, SW.sub.HD a head switch circuit, Q.sub.1, and Q.sub.2 npn type transistors, r.sub.1, and r.sub.2 internal resistance elements, R.sub.1 to R.sub.3 and R.sub.C1 to R.sub.C3 external resistance elements, V.sub.cc an external power source, V'.sub.cc an internal power source line, and MHD a magnetic head.
In this write current setting circuit, the 1 MB mode terminal is comprised by the IC pin T.sub.1 of the integrated circuit IC, the 2 MB mode terminal by the IC pin T.sub.2, and the 4 MB mode terminal by the IC pin T.sub.3.
The inner/outer circumference current switching terminal in the case of 1 MB mode is comprised by the IC pin T.sub.4, the inner/outer circumference current switching terminal in the case of 2 MB mode is comprised by the IC pin T.sub.5, and the inner/outer circumference current switching terminal in the case of 4 MB mode is comprised by the IC pin T.sub.6.
In the integrated circuit, the IC pin T.sub.1 is connected to one terminal of the switch circuit SW.sub.1 and the other terminal of the switch circuit SW.sub.1 is connected to the collector of the transistor Q.sub.1 and the non-inverted input terminal of the amplifier AMP.sub.1.
The IC pin T.sub.2 is connected to one terminal of the switch circuit SW.sub.2, and the other terminal of the switch circuit SW.sub.2 is connected to the collector of the transistor Q.sub.1 and the non-inverted input terminal of the amplifier AMP.sub.1.
The IC pin T.sub.3 is connected to one terminal of the switch circuit SW.sub.3, and the other terminal of the switch circuit SW.sub.3 is connected to the collector of the transistor Q.sub.1 and the non-inverted input terminal of the amplifier AMP.sub.1.
The IC pin T.sub.4 is connected to one terminal of the switch circuit SW.sub.C1, and the other terminal of the switch circuit SW.sub.C1 is connected to the internal reference power source V.sub.ref and the IC pin T.sub.9.
The IC pin T.sub.5 is connected to one terminal of the switch circuit SW.sub.C2, and the other terminal of the switch circuit SW.sub.C2 is connected to the internal reference power source V.sub.ref and the IC pin T.sub.9.
The IC pin T.sub.6 is connected to one terminal of the switch circuit SW.sub.C3, and the other terminal of the switch circuit SW.sub.C3 is connected to the internal reference power source V.sub.ref and the IC pin T.sub.9.
The internal reference power source V.sub.ref is connected to the inverted input terminal of the amplifier AMP.sub.1, while the output of the amplifier AMP.sub.1 is connected to the bases of the transistors Q.sub.1 and Q.sub.2.
The emitters of the transistors Q.sub.1 and Q.sub.2 are grounded through the resistance elements r.sub.1 and r.sub.2.
The collector of the transistor Q.sub.2 is connected to the terminal c of the switch circuit SW.sub.HD, the terminal a of the switch circuit SW.sub.HD is connected to the IC pin T.sub.7, and the terminal b is connected to the IC pin T.sub.8.
At the outside of the integrated circuit IC, one of the ends of each of the external resistance elements R.sub.1, R.sub.2, and R.sub.3 is connected to the external power source V.sub.cc, the terminal T.sub.9, and the magnetic head MHD.
The other end of the resistance element R.sub.1 is connected to the IC pin T.sub.1. At a point on the connection between the two and the IC pin T.sub.4 is connected an external resistance element R.sub.C1.
The other end of the resistance element R.sub.2 is connected to the IC pin T.sub.2. At a point on the connection between the two and the IC pin T.sub.5 is connected an external resistance element R.sub.C2.
The other end of the resistance element R.sub.3 is connected to the IC pin T.sub.3. At a point on the connection between the two and the IC pin T.sub.6 is connected an external resistance element R.sub.C3.
The two terminals of the magnetic head MHD are connected to the IC pins T.sub.7 and T.sub.8, respectively.
The main mode switch circuit SW.sub.1 is turned ON/OFF in accordance with the input of a main mode control signal CM1, main mode switch circuit SW.sub.2 is turned ON/OFF in accordance with the input of a main mode control signal CM2, and the main mode switch circuit SW.sub.3 is turned ON/OFF in accordance with the input of a main mode control signal CM3.
The sub-mode switch circuits SW.sub.C1 to SW.sub.C3 are turned ON/OFF in accordance with the input of the correction current control signal CC for controlling the sub-mode.
The head switch circuit SW.sub.HD switches the connection of the terminal c with the terminals a and b in accordance with the rising edge and falling edge of the pulselike write data. Due to this, the direction of supply of the write current I.sub.W to the magnetic head MHD is changed.
With such a configuration, when writing data at the inner circumference side of the disk in the 1 MB mode, for example, only the main mode control signal CM1 among the main mode control signals CM1 to CM3 is input to the switch circuit SW.sub.1 in the active state. As a result, the switch circuit SW.sub.1 is held in the ON state, and the switch circuits SW.sub.2 and SW.sub.3 are held in the OFF state.
Further, when writing data at the inner circumference side of the disk, avoidance of interference between adjoining data requires that the writing be performed with a current smaller than that at the outer circumference side, so no correction of the current in the sub-mode is performed. Accordingly, the correction current control signal CC is input to the sub-mode switch circuits SW.sub.C1 to SW.sub.C3 in the non-active state, and the switch circuits SW.sub.C1 to SW.sub.C3 are held in the off state. As a result, the internal reference voltage V.sub.REF of the internal reference power source V.sub.ref is applied to the external resistance element R.sub.1, and the write current I.sub.WI at that time is given by the following equation: EQU I.sub.WI =V.sub.REF /R.sub.1V
where R.sub.IV is the resistance value of the resistance element R.sub.1. PA1 where R.sub.C1V is the resistance value of the resistance element R.sub.C1.
On the other hand, when recording data at the outer circumference side of the disk in the 1MB mode, there is little danger of interference between data even if writing deeply, so the correction current I.sub.WC is added to the write current I.sub.WI at the time of writing at the inner circumference side mentioned above and therefore data is written by a current larger than the write current at the inner circumference side. That is, a correction current control signal CC is input to the sub-mode switch circuits SW.sub.C1 to SW.sub.C3 in the active state, and the switch circuits SW.sub.C1 to SW.sub.C3 are held in the on state. As a result, the internal reference voltage V.sub.REF is applied not only to the external resistance element R.sub.1, but also the resistance element R.sub.C1, and the write current I.sub.WO at this time becomes the combined current of the current due to the resistance element R.sub.1 and the current due to the resistance element R.sub.C1 as shown in the following equation: EQU I.sub.WO =(V.sub.REF /R.sub.1V)+{(V.sub.REF)/R.sub.C1V }
However, in the above-mentioned circuit, a total of six external resistance elements R.sub.1 to R.sub.3 and R.sub.C1 to R.sub.C3 and six IC pins T.sub.1 to T.sub.6 is necessary. The same number of IC pins is required as the external resistance elements, so there is the problem that this led to a larger size of the IC package.
When further increasing the number of main modes in the future, if the number of modes is M and the number of correction sub-modes at each mode is C, then the number of IC pins becomes (M.times.C) and therefore the number of pins increases tremendously.